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Sourcecode: linux-fsl-imx51 version File versions  Download package

static int setup_dma_channel ( mxc_dma_channel_t dma,
mx2_dma_info_t dma_info 
) [static]

Set DMA channel parameters.

Parameters:
dma Requested channel NO.
dma_info Channel configuration
Returns:
  • 0 Success
  • others Failure

Definition at line 434 of file dma_mx2.c.

References __clear_dma_interrupt(), mx2_dma_info_t::burstLength, mx2_dma_info_t::busuntils, mxc_dma_channel::channel, mx2_dma_info_t::destPort, mx2_dma_info_t::destType, mx2_dma_info_t::dir, disable_dma_clk(), mx2_dma_priv_s::dma_base, mx2_dma_info_t::dma_chaining, mx2_dma_priv_s::dma_chaining, mx2_dma_info_t::M2D_Valid, mx2_dma_info_t::mode, mx2_dma_info_t::msel, mxc_dma_channel::private, mx2_dma_info_t::ren, mx2_dma_priv_s::ren, mx2_dma_info_t::request, mx2_dma_info_t::rto_en, mx2_dma_info_t::sourcePort, mx2_dma_info_t::sourceType, unmask_dma_interrupt(), mx2_dma_info_t::W, mx2_dma_info_t::X, and mx2_dma_info_t::Y.

Referenced by __init_dma_channel().

{
      mx2_dma_priv_t *priv = (mx2_dma_priv_t *) (dma ? dma->private : NULL);
      dma_regs_t *dma_base;
      unsigned long reg;

      if (!dma_info || !priv) {
            return -1;
      }

      if (dma_info->sourceType > 3) {
            return -1;
      }
      if (dma_info->destType > 3) {
            return -1;
      }
      if (dma_info->destPort > 3) {
            return -1;
      }
      if (dma_info->sourcePort > 3) {
            return -1;
      }
      if (dma_info->M2D_Valid) {
            /*add for second dma */
            if (dma_info->W < dma_info->X) {
                  return -1;
            }
      }

      priv->dma_chaining = dma_info->dma_chaining;
      priv->ren = dma_info->ren;

      if (dma_info->sourceType != DMA_TYPE_FIFO
          && dma_info->destType != DMA_TYPE_FIFO) {
            if (dma_info->ren) {
                  printk(KERN_INFO
                         "Warning:request enable just affect source or destination port is FIFO !\n");
                  priv->ren = 0;
            }
      }

      if (dma_info->M2D_Valid) {
            if (dma_info->msel) {
                  __raw_writel(dma_info->W,
                             IO_ADDRESS(DMA_BASE_ADDR) + DMA_WSRB);
                  __raw_writel(dma_info->X,
                             IO_ADDRESS(DMA_BASE_ADDR) + DMA_XSRB);
                  __raw_writel(dma_info->Y,
                             IO_ADDRESS(DMA_BASE_ADDR) + DMA_YSRB);

            } else {
                  __raw_writel(dma_info->W,
                             IO_ADDRESS(DMA_BASE_ADDR) + DMA_WSRA);
                  __raw_writel(dma_info->X,
                             IO_ADDRESS(DMA_BASE_ADDR) + DMA_XSRA);
                  __raw_writel(dma_info->Y,
                             IO_ADDRESS(DMA_BASE_ADDR) + DMA_YSRA);
            }
      }

      dma_base = (dma_regs_t *) (priv->dma_base);

      __raw_writel(dma_info->burstLength, &(dma_base->BurstLength));
      __raw_writel(dma_info->request, &(dma_base->RequestSource));

      if (dma_info->ren) {
            reg = dma_info->busuntils & 0x1FFFF;
            if (dma_info->rto_en) {
                  reg |= 0xE000;
            }
            __raw_writel(reg, &(dma_base->BusUtilt));
      } else {
            __raw_writel(dma_info->busuntils, &(dma_base->BusUtilt));
      }

      reg = __raw_readl(&(dma_base->Ctl)) & (~(DMA_CTL_ACRPT | DMA_CTL_RPT));

      if (dma_info->dir) {
            reg |= DMA_CTL_MDIR;
      } else {
            reg &= ~DMA_CTL_MDIR;
      }

      if (priv->ren) {
            reg |= DMA_CTL_REN;
      } else {
            reg &= ~DMA_CTL_REN;
      }

      if ((dma_info->M2D_Valid) && (dma_info->msel)) {
            reg |= DMA_CTL_MSEL;
      } else {
            reg &= ~DMA_CTL_MSEL;
      }

      if (dma_info->mode) {
            DMA_CTL_SET_SMOD(reg, dma_info->destType);
            DMA_CTL_SET_SSIZ(reg, dma_info->destPort);
            DMA_CTL_SET_DMOD(reg, dma_info->sourceType);
            DMA_CTL_SET_DSIZ(reg, dma_info->sourcePort);
      } else {
            DMA_CTL_SET_SMOD(reg, dma_info->sourceType);
            DMA_CTL_SET_SSIZ(reg, dma_info->sourcePort);
            DMA_CTL_SET_DMOD(reg, dma_info->destType);
            DMA_CTL_SET_DSIZ(reg, dma_info->destPort);
      }

      __raw_writel(reg, &(dma_base->Ctl));

      __clear_dma_interrupt(dma->channel);
      unmask_dma_interrupt(dma->channel);

      disable_dma_clk();
      return 0;
}


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