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Sourcecode: linux-fsl-imx51 version File versions  Download package

int32_t ipu_csi_init_interface ( uint16_t  width,
uint16_t  height,
uint32_t  pixel_fmt,
ipu_csi_signal_cfg_t  cfg_param 
)

ipu_csi_init_interface Sets initial values for the CSI registers. The width and height of the sensor and the actual frame size will be set to the same values.

Parameters:
width Sensor width
height Sensor height
pixel_fmt pixel format
cfg_param ipu_csi_signal_cfg_t structure
csi csi 0 or csi 1
Returns:
0 for success, -EINVAL for error

Definition at line 47 of file ipu_capture.c.

References _ipu_csi_ccir_err_detection_disable(), _ipu_csi_ccir_err_detection_enable(), ipu_csi_signal_cfg_t::clk_mode, ipu_csi_signal_cfg_t::csi, ipu_csi_signal_cfg_t::data_en_pol, ipu_csi_signal_cfg_t::data_fmt, ipu_csi_signal_cfg_t::data_pol, ipu_csi_signal_cfg_t::data_width, ipu_csi_signal_cfg_t::ext_vsync, ipu_csi_signal_cfg_t::force_eof, ipu_csi_signal_cfg_t::Hsync_pol, ipu_csi_signal_cfg_t::pack_tight, ipu_csi_signal_cfg_t::pixclk_pol, and ipu_csi_signal_cfg_t::Vsync_pol.

{
      uint32_t data = 0;
      uint32_t csi = cfg_param.csi;
      unsigned long lock_flags;

      /* Set SENS_DATA_FORMAT bits (8, 9 and 10)
         RGB or YUV444 is 0 which is current value in data so not set
         explicitly
         This is also the default value if attempts are made to set it to
         something invalid. */
      switch (pixel_fmt) {
      case IPU_PIX_FMT_YUYV:
            cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_YUYV;
            break;
      case IPU_PIX_FMT_UYVY:
            cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_YUV422_UYVY;
            break;
      case IPU_PIX_FMT_RGB24:
      case IPU_PIX_FMT_BGR24:
            cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_RGB_YUV444;
            break;
      case IPU_PIX_FMT_GENERIC:
            cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_BAYER;
            break;
      case IPU_PIX_FMT_RGB565:
            cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_RGB565;
            break;
      case IPU_PIX_FMT_RGB555:
            cfg_param.data_fmt = CSI_SENS_CONF_DATA_FMT_RGB555;
            break;
      default:
            return -EINVAL;
      }

      /* Set the CSI_SENS_CONF register remaining fields */
      data |= cfg_param.data_width << CSI_SENS_CONF_DATA_WIDTH_SHIFT |
            cfg_param.data_fmt << CSI_SENS_CONF_DATA_FMT_SHIFT |
            cfg_param.data_pol << CSI_SENS_CONF_DATA_POL_SHIFT |
            cfg_param.Vsync_pol << CSI_SENS_CONF_VSYNC_POL_SHIFT |
            cfg_param.Hsync_pol << CSI_SENS_CONF_HSYNC_POL_SHIFT |
            cfg_param.pixclk_pol << CSI_SENS_CONF_PIX_CLK_POL_SHIFT |
            cfg_param.ext_vsync << CSI_SENS_CONF_EXT_VSYNC_SHIFT |
            cfg_param.clk_mode << CSI_SENS_CONF_SENS_PRTCL_SHIFT |
            cfg_param.pack_tight << CSI_SENS_CONF_PACK_TIGHT_SHIFT |
            cfg_param.force_eof << CSI_SENS_CONF_FORCE_EOF_SHIFT |
            cfg_param.data_en_pol << CSI_SENS_CONF_DATA_EN_POL_SHIFT;

      spin_lock_irqsave(&ipu_lock, lock_flags);

      __raw_writel(data, CSI_SENS_CONF(csi));

      /* Setup sensor frame size */
      __raw_writel((width - 1) | (height - 1) << 16, CSI_SENS_FRM_SIZE(csi));

      /* Set CCIR registers */
      if ((cfg_param.clk_mode == IPU_CSI_CLK_MODE_CCIR656_PROGRESSIVE) ||
          (cfg_param.clk_mode == IPU_CSI_CLK_MODE_CCIR656_INTERLACED)) {
            _ipu_csi_ccir_err_detection_enable(csi);
            __raw_writel(0x40030, CSI_CCIR_CODE_1(csi));
            __raw_writel(0xFF0000, CSI_CCIR_CODE_3(csi));
      } else if ((cfg_param.clk_mode ==
                  IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_DDR) ||
            (cfg_param.clk_mode ==
                  IPU_CSI_CLK_MODE_CCIR1120_PROGRESSIVE_SDR) ||
            (cfg_param.clk_mode ==
                  IPU_CSI_CLK_MODE_CCIR1120_INTERLACED_DDR) ||
            (cfg_param.clk_mode ==
                  IPU_CSI_CLK_MODE_CCIR1120_INTERLACED_SDR)) {
            _ipu_csi_ccir_err_detection_enable(csi);
            __raw_writel(0x40030, CSI_CCIR_CODE_1(csi));
            __raw_writel(0xFF0000, CSI_CCIR_CODE_3(csi));
      } else if ((cfg_param.clk_mode == IPU_CSI_CLK_MODE_GATED_CLK) ||
               (cfg_param.clk_mode == IPU_CSI_CLK_MODE_NONGATED_CLK)) {
            _ipu_csi_ccir_err_detection_disable(csi);
      }

      dev_dbg(g_ipu_dev, "CSI_SENS_CONF = 0x%08X\n",
            __raw_readl(CSI_SENS_CONF(csi)));
      dev_dbg(g_ipu_dev, "CSI_ACT_FRM_SIZE = 0x%08X\n",
            __raw_readl(CSI_ACT_FRM_SIZE(csi)));

      spin_unlock_irqrestore(&ipu_lock, lock_flags);

      return 0;
}


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