Logo Search packages:      
Sourcecode: linux-fsl-imx51 version File versions  Download package

iomux.h File Reference


Detailed Description

I/O Muxing control definitions and functions.

Definition in file iomux.h.

#include <linux/types.h>
#include <mach/gpio.h>
#include "mx31_pins.h"

Go to the source code of this file.

Typedefs

typedef enum iomux_gp_func iomux_gp_func_t
typedef enum iomux_pad_config iomux_pad_config_t
typedef enum iomux_input_config iomux_pin_icfg_t
typedef unsigned int iomux_pin_name_t
typedef enum iomux_output_config iomux_pin_ocfg_t

Enumerations

enum  iomux_gp_func {
  MUX_SDCTL_CSD0_SEL = 0x1 << 0, MUX_SDCTL_CSD1_SEL = 0x1 << 1, MUX_PGP_FIRI = 0x1 << 0, MUX_DDR_MODE = 0x1 << 1,
  MUX_PGP_CSPI_BB = 0x1 << 2, MUX_PGP_ATA_1 = 0x1 << 3, MUX_PGP_ATA_2 = 0x1 << 4, MUX_PGP_ATA_3 = 0x1 << 5,
  MUX_PGP_ATA_4 = 0x1 << 6, MUX_PGP_ATA_5 = 0x1 << 7, MUX_PGP_ATA_6 = 0x1 << 8, MUX_PGP_ATA_7 = 0x1 << 9,
  MUX_PGP_ATA_8 = 0x1 << 10, MUX_PGP_UH2 = 0x1 << 11, MUX_SDCTL_CSD0_SEL = 0x1 << 12, MUX_SDCTL_CSD1_SEL = 0x1 << 13,
  MUX_CSPI1_UART3 = 0x1 << 14, MUX_EXTDMAREQ2_MBX_SEL = 0x1 << 15, MUX_TAMPER_DETECT_EN = 0x1 << 16, MUX_PGP_USB_4WIRE = 0x1 << 17,
  MUX_PGB_USB_COMMON = 0x1 << 18, MUX_SDHC_MEMSTICK1 = 0x1 << 19, MUX_SDHC_MEMSTICK2 = 0x1 << 20, MUX_PGP_SPLL_BYP = 0x1 << 21,
  MUX_PGP_UPLL_BYP = 0x1 << 22, MUX_PGP_MSHC1_CLK_SEL = 0x1 << 23, MUX_PGP_MSHC2_CLK_SEL = 0x1 << 24, MUX_CSPI3_UART5_SEL = 0x1 << 25,
  MUX_PGP_ATA_9 = 0x1 << 26, MUX_PGP_USB_SUSPEND = 0x1 << 27, MUX_PGP_USB_OTG_LOOPBACK = 0x1 << 28, MUX_PGP_USB_HS1_LOOPBACK = 0x1 << 29,
  MUX_PGP_USB_HS2_LOOPBACK = 0x1 << 30, MUX_CLKO_DDR_MODE = 0x1 << 31, MUX_SDCTL_CSD0_SEL = 0x1 << 0, MUX_SDCTL_CSD1_SEL = 0x1 << 1,
  MUX_TAMPER_DETECT_EN = 0x1 << 2, MUX_IPD_ESDHC_DREQ_B = 0x0 << 0, MUX_XDRQ = 0x1 << 0, MUX_EMI_DMA_ACCESS_1 = 0x0 << 4,
  MUX_KEY_COL2 = 0x1 << 4, MUX_TAMPER_DETECT_EN = 0x1 << 8, MUX_IPUv3D_TVE = 0x0 << 12, MUX_IPUv3D_CAMP = 0x1 << 12
}
enum  iomux_input_config {
  INPUT_CTL_PATH0 = 0x0, INPUT_CTL_PATH1, INPUT_CTL_PATH2, INPUT_CTL_PATH3,
  INPUT_CTL_PATH4, INPUT_CTL_PATH5, INPUT_CTL_PATH6, INPUT_CTL_PATH7,
  INPUTCONFIG_NONE = 0, INPUTCONFIG_GPIO = 1 << 0, INPUTCONFIG_FUNC = 1 << 1, INPUTCONFIG_ALT1 = 1 << 2,
  INPUTCONFIG_ALT2 = 1 << 3, INPUT_CTL_PATH0 = 0x0, INPUT_CTL_PATH1, INPUT_CTL_PATH2,
  INPUT_CTL_PATH3, INPUT_CTL_PATH4, INPUT_CTL_PATH5, INPUT_CTL_PATH6,
  INPUT_CTL_PATH7, INPUT_CTL_PATH0 = 0x0, INPUT_CTL_PATH1, INPUT_CTL_PATH2,
  INPUT_CTL_PATH3, INPUT_CTL_PATH4, INPUT_CTL_PATH5, INPUT_CTL_PATH6,
  INPUT_CTL_PATH7, INPUT_CTL_PATH0 = 0x0, INPUT_CTL_PATH1, INPUT_CTL_PATH2,
  INPUT_CTL_PATH3, INPUT_CTL_PATH4, INPUT_CTL_PATH5, INPUT_CTL_PATH6,
  INPUT_CTL_PATH7
}
enum  iomux_output_config {
  OUTPUTCONFIG_GPIO = 0, OUTPUTCONFIG_FUNC, OUTPUTCONFIG_ALT1, OUTPUTCONFIG_ALT2,
  OUTPUTCONFIG_ALT3, OUTPUTCONFIG_ALT4, OUTPUTCONFIG_ALT5, OUTPUTCONFIG_ALT6
}
enum  iomux_pad_config {
  PAD_CTL_DRV_3_3V = 0x0 << 13, PAD_CTL_DRV_1_8V = 0x1 << 13, PAD_CTL_HYS_CMOS = 0x0 << 8, PAD_CTL_HYS_SCHMITZ = 0x1 << 8,
  PAD_CTL_PKE_NONE = 0x0 << 7, PAD_CTL_PKE_ENABLE = 0x1 << 7, PAD_CTL_PUE_KEEPER = 0x0 << 6, PAD_CTL_PUE_PULL = 0x1 << 6,
  PAD_CTL_PUE_PUD = 0x1 << 6, PAD_CTL_100K_PD = 0x0 << 4, PAD_CTL_47K_PU = 0x1 << 4, PAD_CTL_100K_PU = 0x2 << 4,
  PAD_CTL_22K_PU = 0x3 << 4, PAD_CTL_ODE_CMOS = 0x0 << 3, PAD_CTL_ODE_OpenDrain = 0x1 << 3, PAD_CTL_DRV_NORMAL = 0x0 << 1,
  PAD_CTL_DRV_HIGH = 0x1 << 1, PAD_CTL_DRV_MAX = 0x2 << 1, PAD_CTL_SRE_SLOW = 0x0 << 0, PAD_CTL_SRE_FAST = 0x1 << 0,
  PAD_CTL_NOLOOPBACK = 0x0 << 9, PAD_CTL_LOOPBACK = 0x1 << 9, PAD_CTL_PKE_NONE = 0x0 << 8, PAD_CTL_PKE_ENABLE = 0x1 << 8,
  PAD_CTL_PUE_KEEPER = 0x0 << 7, PAD_CTL_PUE_PUD = 0x1 << 7, PAD_CTL_100K_PD = 0x0 << 5, PAD_CTL_100K_PU = 0x1 << 5,
  PAD_CTL_47K_PU = 0x2 << 5, PAD_CTL_22K_PU = 0x3 << 5, PAD_CTL_HYS_CMOS = 0x0 << 4, PAD_CTL_HYS_SCHMITZ = 0x1 << 4,
  PAD_CTL_ODE_CMOS = 0x0 << 3, PAD_CTL_ODE_OpenDrain = 0x1 << 3, PAD_CTL_DRV_NORMAL = 0x0 << 1, PAD_CTL_DRV_HIGH = 0x1 << 1,
  PAD_CTL_DRV_MAX = 0x2 << 1, PAD_CTL_SRE_SLOW = 0x0 << 0, PAD_CTL_SRE_FAST = 0x1 << 0, PAD_CTL_DRV_3_3V = 0x0 << 13,
  PAD_CTL_DRV_1_8V = 0x1 << 13, PAD_CTL_HYS_CMOS = 0x0 << 8, PAD_CTL_HYS_SCHMITZ = 0x1 << 8, PAD_CTL_PKE_NONE = 0x0 << 7,
  PAD_CTL_PKE_ENABLE = 0x1 << 7, PAD_CTL_PUE_KEEPER = 0x0 << 6, PAD_CTL_PUE_PUD = 0x1 << 6, PAD_CTL_100K_PD = 0x0 << 4,
  PAD_CTL_47K_PU = 0x1 << 4, PAD_CTL_100K_PU = 0x2 << 4, PAD_CTL_22K_PU = 0x3 << 4, PAD_CTL_ODE_CMOS = 0x0 << 3,
  PAD_CTL_ODE_OpenDrain = 0x1 << 3, PAD_CTL_DRV_NORMAL = 0x0 << 1, PAD_CTL_DRV_HIGH = 0x1 << 1, PAD_CTL_DRV_MAX = 0x2 << 1,
  PAD_CTL_SRE_SLOW = 0x0 << 0, PAD_CTL_SRE_FAST = 0x1 << 0, PAD_CTL_SRE_SLOW = 0x0 << 0, PAD_CTL_SRE_FAST = 0x1 << 0,
  PAD_CTL_DRV_LOW = 0x0 << 1, PAD_CTL_DRV_MEDIUM = 0x1 << 1, PAD_CTL_DRV_HIGH = 0x2 << 1, PAD_CTL_DRV_MAX = 0x3 << 1,
  PAD_CTL_ODE_OPENDRAIN_NONE = 0x0 << 3, PAD_CTL_ODE_OPENDRAIN_ENABLE = 0x1 << 3, PAD_CTL_100K_PD = 0x0 << 4, PAD_CTL_47K_PU = 0x1 << 4,
  PAD_CTL_100K_PU = 0x2 << 4, PAD_CTL_22K_PU = 0x3 << 4, PAD_CTL_PUE_KEEPER = 0x0 << 6, PAD_CTL_PUE_PULL = 0x1 << 6,
  PAD_CTL_PKE_NONE = 0x0 << 7, PAD_CTL_PKE_ENABLE = 0x1 << 7, PAD_CTL_HYS_NONE = 0x0 << 8, PAD_CTL_HYS_ENABLE = 0x1 << 8,
  PAD_CTL_DDR_INPUT_CMOS = 0x0 << 9, PAD_CTL_DDR_INPUT_DDR = 0x1 << 9, PAD_CTL_DRV_VOT_LOW = 0x0 << 13, PAD_CTL_DRV_VOT_HIGH = 0x1 << 13,
  PAD_CTL_SRE_SLOW = 0x0 << 0, PAD_CTL_SRE_FAST = 0x1 << 0, PAD_CTL_DRV_LOW = 0x0 << 1, PAD_CTL_DRV_MEDIUM = 0x1 << 1,
  PAD_CTL_DRV_HIGH = 0x2 << 1, PAD_CTL_DRV_MAX = 0x3 << 1, PAD_CTL_ODE_OPENDRAIN_NONE = 0x0 << 3, PAD_CTL_ODE_OPENDRAIN_ENABLE = 0x1 << 3,
  PAD_CTL_100K_PD = 0x0 << 4, PAD_CTL_47K_PU = 0x1 << 4, PAD_CTL_100K_PU = 0x2 << 4, PAD_CTL_22K_PU = 0x3 << 4,
  PAD_CTL_PUE_KEEPER = 0x0 << 6, PAD_CTL_PUE_PULL = 0x1 << 6, PAD_CTL_PKE_NONE = 0x0 << 7, PAD_CTL_PKE_ENABLE = 0x1 << 7,
  PAD_CTL_HYS_NONE = 0x0 << 8, PAD_CTL_HYS_ENABLE = 0x1 << 8, PAD_CTL_DDR_INPUT_CMOS = 0x0 << 9, PAD_CTL_DDR_INPUT_DDR = 0x1 << 9,
  PAD_CTL_DRV_VOT_LOW = 0x0 << 13, PAD_CTL_DRV_VOT_HIGH = 0x1 << 13
}

Functions

void iomux_config_gpr (iomux_gp_func_t gp, bool en)
int iomux_config_mux (iomux_pin_name_t pin, iomux_pin_ocfg_t out, iomux_pin_icfg_t in)
void iomux_config_pad (iomux_pin_name_t pin, __u32 config)
void mxc_free_iomux (iomux_pin_name_t pin, iomux_pin_ocfg_t out, iomux_pin_icfg_t in)
void mxc_iomux_set_gpr (iomux_gp_func_t gp, bool en)
void mxc_iomux_set_pad (iomux_pin_name_t pin, u32 config)
int mxc_request_iomux (iomux_pin_name_t pin, iomux_pin_ocfg_t out, iomux_pin_icfg_t in)


Generated by  Doxygen 1.6.0   Back to index